A silicon controlled rectifier (SCR) is often used as an electrostatic discharge (ESD) protection device for a circuit. In this case, during normal operation of the circuit, the SCR is in an off state with a very high resistance. As a result, only leakage current passes through the SCR. However, after a sufficient voltage (i.e., a snapback trigger voltage) is applied, e.g., due to an ESD event, the SCR transitions to a low resistance state and begins conducting current, thereby facilitating the discharge of the current away from the other components in the circuit. A typical SCR is a PNPN device that includes two coupled bipolar transistors. FIGS. 1A and 1B show an illustrative SCR 2 and circuit diagram 4 of SCR 2 according to the prior art.
Various types of SCRs 2 have been developed for ESD protection and can be selected for implementation in a circuit based on the operating characteristics of the circuit and the corresponding SCR 2. For example, a breakdown triggered SCR (BDSCR) can be used as an ESD protection device when the signal on a bus may be as high as tens of volts peak to peak. Other SCRs used for ESD protection include a low-voltage triggering SCR (LVTSCR), which can be triggered by a grounded gate negative-channel metal oxide semiconductor (GGNMOS), a diode-string triggered SCR (DTSCR), and the like.
Regardless, it is desirable to accurately simulate the behavior of a circuit, including the ESD protection circuit and SCR, prior to manufacturing the circuit. Accurate simulation provides a better prediction of the behavior of the circuit, and can reduce the number of failures of circuit components due to improper operation, e.g., of the ESD protection circuit under an ESD event. However, circuit diagram 4 requires complex parameter extraction in order to simulate its behavior within a circuit. As a result, previous approaches have sought to provide an alternative model for use in conjunction with simulation models of circuits including an SCR 2.
To this extent, FIG. 2 shows an alternative circuit diagram of a model 6 of SCR 2 according to the prior art. Model 6 uses a simple, mathematical approach to modeling the behavior of SCR 2. In model 6, the shared base-collector junction of the PNP and NPN transistors of SCR 2 is replaced by a current controlled voltage source to simulate the snapback and a smoothing function is used to ensure continuity. However, model 6 loses much of the physical representation of SCR 2, and cannot be extended to a four terminal SCR model.
FIG. 3 shows another alternative circuit diagram of a model 8 of SCR 2 according to the prior art. Model 8 includes a simplification of the Ebers-Moll models for the corresponding bipolar junction transistors. While model 8 accurately represents the physical aspects of SCR 2 and includes four terminals, model 8 remains difficult to characterize and parameter extraction is more difficult than model 6. For example, model 8 requires the extraction of various parameters based on measurements of the bipolar junction transistors in order to successfully characterize model 8. The complexity of the model also brings in convergence problems during simulation.